When we introduced our DDR SDRAM, it was revolutionary and pioneering technology. DDR allows applications to transfer data on both the rising and falling edges of a clock signal, doubling bandwidth and vastly improving performance over SDR SDRAM. To achieve this functionality, we use a 2n-prefetch architecture where the internal data bus is double the size of the external data bus, so data capture can happen two times each clock cycle.
Micron’s Product Lifecycle Solutions bring the stability of our memory support in alignment with the lifecycle of your design.
Calculate an accurate power budget for the memory needed in your design.